Abstract: The Object Management Group (OMG) Unified Modeling Manguage (UML) profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE) aims at using the general-purpose modeling language UML in the domain of Real-Time and Embedded (RTE) systems. To achieve this goal, it is absolutely required to introduce inside the mainly untimed UML an unambiguous time structure which MARTE model elements can rely on to build precise models amenable to formal analysis. The MARTE Time model has defined such a structure. We have also defined a non-normative concrete syntax called the Clock Constraint Specification Language (CCSL) to demonstrate what can be done based on this structure.
This paper gives a brief overview of this syntax and its formal semantics, and shows how existing UML model elements can be used to apply this syntax in a graphical way and benefit from the semantics.
Abstract: The emerging OMG UML Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE) aims, amongst other things, at providing a referential Time Model subprofile where semantic issues can be explicitly and formally described. As a full-size exercise we deal here with the modeling of immediate and delayed data communications in AADL. This actually reflects an important issue in RT/E model semantics: a propagation of immediate communications may result in a combinatorial loop, with ill-defined behavior; introduction of delays may introduce races, which have to be controlled. We describe here the abilities of the MARTE time model in this respect.
Abstract: In the real-time and embedded domain, systems tend to combine periodic and aperiodic computations. This leads to mixing event-based with time-triggered communications with their pros and cons. Then, modeling standards of the domain must provide mechanisms to support both kinds whereas historically they pertain to different communities: asynchronous and synchronous designers. In this paper, we compare the expressiveness of two standards of the domain (AADL and MARTE) to model these two kinds of communications. Specifically, we focus on the Time facilities of MARTE and on AADL models amenable to end-to-end flow latency analyses.
Abstract: AADL and MARTE are both modeling formalisms supporting the analysis of real-time embedded systems. We investigate how MARTE, with its Time Model facilities, can be made to represent faithfully AADL periodic/aperiodic tasks communicating through event or data ports, in an approach to end-to-end flow latency analysis.
Abstract: As its name promises, the Unified Modeling Language (UML) provides a collection of diagrammatic modeling styles. To the early class/objects and use-case diagrams were almost immediately added state-, activity-, collaboration-, and component diagrams. All these modeling views, required for structural and behavioral representations of systems, were then progressed to further detailed expressivity. Provision for domain- specific specializations was made under the form of profiles.
Somehow this goal of being rather universal and extendible discarded the possibility of UML to adopt too strict and precise a semantics; as users were generally to define and refine it in their stereotyped profiles anyway. As a result, even the little execution semantics there is in the standard is often not considered in such specializations.
We tackled the general issue of defining a broadly expressive Time Model as a sub-profile of the upcoming OMG Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE), currently undergoing finalization at OMG. The goal is to provide a generic timed interpretation, on which timed models of computation and timed simulation semantics could be built inside the UML definition scope, instead of as part of the many external proprietary profiles. The MARTE time library can be used as the basis for the definition of a UML real-time simulator.
Abstract: The forthcoming OMG UML Profile for Modeling and Analysis of Real-Time Embedded systems (MARTE) aims, amongst other things, at providing a referential Time Model subprofile where semantic issues can be explicitly and formally described. As a full-size exercise we deal here with the modeling of immediate and delayed data communications in AADL. It actually reflects an important issue in RT/E model semantics: a propagation of immediate communications may result in a combinatorial loop, with ill-defined behavior; introduction of delays may introduce races, which have to be controlled. We describe here the abilities of MARTE in this respect.
Abstract: This article introduces the Time Model subprofile of MARTE, a new OMG UML Profile dedicated to Modeling and Analysis of Real-Time and Embedded systems. After a brief presentation of former time modeling elements present in SPT and UML2, we introduce the Time meta-model of MARTE. It defines physical and logical time, timed model elements and their associated properties. We present both the time domain view and the UML representation of the most important concepts. Various time bases (called clocks in the profile) can be correlated using clock relations and constraints, built from a core set prede?ned in the profile. Constraints are usually collected from scheduling and partitioning decisions taken in the course of design ?ow for embedded systems. We illustrate this on two simple examples.
Abstract: Time and timing features are an important aspect of modern electronic systems, often of embedded nature. We argue here that in early design phases, time is often of logical (rather than physical) nature, even possibly multiform. The compilation/synthesis of heterogeneous applications onto architecture platforms then largely amounts to adjusting the former logical time(s) demands onto the latter physical time abilities. Many distributed scheduling techniques pertain to this approach of time refinement. We provide extensive Time and Allocation metamodels that open the possibility to cast this approach in a Model-Driven Engineering light. We give a UML representation of these concepts through two subprofiles, parts of the foundations of the forthcoming OMG UML Profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE). Time modeling also allows for a precise description of time-related entities and their associated timed properties.
Abstract: Each domain has its own interpretation of time. We propose to extend UML, which is more and more used in the domain of real-time embedded applications, with a concept of time inherited from reactive system modeling : multiform time.
After a brief review of some UML profiles, we present our extensions and we illustrate on an example from the automotive industry how to represent and to constraint behaviors depending on multiform time. We advocate that this model of time offers wider possibilities than restricting models only to the physical time.
Abstract: In the context of an effort to answer the OMG RFP for Modeling and Analysis of Real-Time Embedded systems (MARTE), we are defining extensions to the simple time model of UML2. After a brief review of some time-related UML profiles, we focus on the specificity of our approach: the ability to take account of multiform time-a concept inherited from reactive system modeling. Using an example from the automotive industry, we illustrate the use of our profile to represent, to constraint and to analyze behaviors depending on multiform time.
Abstract: UML goal of being a general-purpose modeling language discards the possibility to adopt too precise and strict a semantics. Users are to refine or define the semantics in their domain specific profiles. In the UML Profile for Modeling and Analysis of Real-Time and Embedded systems, we have defined a broadly expressive Time Model to provide a generic timed interpretation for UML models. Our clock constraint specification language supports the specification of systems with multiple clock domains. Starting with a priori independent clocks, we progressively compose them to get a family of possible executions. Our language supports both synchronous and asynchronous compositions, just like the synchronous language Signal, but also allows explicit non determinism. In this paper, we give a formal semantics to a core subset of MARTE clock constraint languages and we give an equivalent interpretation of this kernel in two other very different formal languages, Signal and Time Petri Nets.
Abstract: The UML Profile for Modeling and Analysis of Real-Time and Embedded (RTE) systems has recently been adopted by the OMG. Its Time Model extends the informal and simplistic Simple Time package proposed by UML2 and offers a broad range of capabilities required to model RTE systems including both discrete/dense and chronometric/logical time. MARTE OMG specification introduces a Time Structure inspired from Time models of the concurrency theory and proposes a new clock constraint specification language (CCSL) to specify, within the context of UML, usual logical and chronometric time constraints.
This paper presents, for the first time, the formal semantics of some representative CCSL clock constraints concerning logical discrete-time. Considering the Time Structure as a concurrent system, we propose a dynamic interpretation to build acceptable solutions that fully respect the constraints. An unusual example about processing Easter days illustrates the use of CCSL and the construction of solutions.
Abstract: Building a UML profile may be a tedious and error-prone process. There is no precise methodology to guide the process or to verify that all concepts have been implemented once and only once. Best practices recommend starting by gathering concepts in a technology-independent domain view before implementation. Still, the adequation between the domain view and the implementation should be verified.
This paper proposes an automatic process to transform a domain model into a profile-based implementation. To reduce accidental complexity in the domain model and fully benefit from advanced profiling features in the generated profile, our process uses the multi-level paradigm and its deep characterization mechanisms. The value of this paradigm for the definition of UML profiles is assessed and applied to the subset of a recently adopted OMG UML Profile, an excerpt of the MARTE time profile.
As a by-product, our process involves an inexpensive profile-based implementation of the multi-level paradigm within UML2 tools.
