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Aurélien Lecavelier des Etangs-Levallois

IEMN
Cité Scientifique
Avenue Poincaré
F-59652 Villeneuve d'Ascq
FRANCE

Tel.: +33 320 197 975
aurelien.lecavelier@isen.fr
Aurélien Lecavelier des Etangs-Levallois received the master of research degree in nanomaterials from the Imperial College London in 2004. He also graduated from the French engineering school Ecole des Mines de Nancy in 2004. He then joined the Silicon Microelectronics group at the Institut d’Electronique, de Microélectronique et de Nanotechnologie (IEMN) in 2009 as a Ph.D. student. His research work mainly focuses on high frequency flexible electronics.

Journal articles

2013
2011
M Lesecq, V Hoel, A Lecavelier des Etangs-Levallois, E Pichonat, Y Douvry, J C De Jaeger (2011)  High Performance of AlGaN/GaN HEMTs Reported on Adhesive Flexible Tape   IEEE Elec. Dev. Lett. 32: 2. 143-145 Feb.  
Abstract: In this letter, for the first time to our knowledge, high dc characteristics of AlGaN/GaN/silicon high-electron-mobility transistors transferred onto a thermally enhanced adhesive flexible tape are reported. Transmission line method (TLM) pattern supported on a flexible tape under 0.5% strain exhibits a high current density of 260 mA/mm. DC measurements performed on a representative gate-TLM device (LG = 2 μm) on a flexible tape are presented. Under 0.16 % strain, the device exhibits a maximum drain current of 300 mA/mm for a gate bias of 0 V and a drain bias of 3 V and withstands VDS = 18 V.
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Xiaohui Tang, Christophe Krzeminski, Aurélien Lecavelier des Etangs-Levallois, Zhenkun Chen, Emmanuel Dubois, Erich Kasper, Alim Karmous, Nicolas Reckinger, Denis Flandre, Laurent A Francis, Jean-Pierre Colinge, Jean-Pierre Raskin (2011)  Energy-Band Engineering for Improved Charge Retention in Fully Self-Aligned Double Floating-Gate Single-Electron Memories   NanoLetters 11: 11. 4520–4526  
Abstract: We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stored charge leakage is induced not only by quantum effects but also by the conduction-band offset that arises between Ge and Si. The dimensions and position of each floating gate are well-defined and controlled. The devices exhibit a long retention time and single-electron injection at room temperature.
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Aurélien Lecavelier des Etangs-Levallois, Emmanuel Dubois, Marie Lesecq, François Danneville, Laurent Poulain, Yoann Tagro, Sylvie Lepilliet, Daniel Gloria, Christine Raynaud, David Troadec (2011)  150-GHz RF SOI-CMOS Technology in Ultrathin Regime on Organic Substrate   Electron Device Letters, IEEE 32: 11. 1510-1512 Nov  
Abstract: This letter provides an experimental demonstration of high-performance industrial MOSFETs thinned down to 5.7 μm and transferred onto a 125-μm-thick polyethylene naphthalate foil. The die stack transferred onto the organic substrate comprises the 200-nm-thick active layer and the 5.5-μm-thick interconnection multilayer stack resulting in a light, compact, and bendable thin film. We unveil that dc and RF performances are invariant even for ultimate thinning down to the buried oxide layer. Furthermore, n-MOSFET performance is improved by 1.5à compared with previous work, and the first demonstration of 100-GHz p-MOSFETs on an organic substrate is presented. Unity-current-gain cutoff and maximum oscillation frequencies as high as 150/160 GHz for n-MOSFETs and 100/130 GHz for p-MOSFETs on a plastic substrate have been measured, respectively.
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Conference papers

2012
Aurélien Lecavelier des Etangs-Levallois, Emmanuel Dubois, Marie Lesecq, François Danneville, Yoann Tagro, Sylvie Lepilliet, Daniel Gloria, Christine Raynaud (2012)  Radio Frequency and low Noise Characteristics of SOI Technology on Plastic for Flexible Electronics   In: 8th Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits (EuroSOI 2012), Montpelier, France, January 23rd – 25th, 2012  
Abstract: In this work, we report on the RF performance and noise characteristics of 65nm SOI-CMOS technology transferred onto plastic films. After transfer bonding onto a thin flexible substrate, RF-SOI-MOSFETs are shown to feature high unity-current-gain cut-off and maximum oscillation frequencies fT/fMAX amounting to 150/160GHz for n-type and 110/130GHz for p-type, respectively. Minimal noise figure and associated gain NFmin/Ga of 0.57dB/17.8dB and 0.57dB/17.0dB are measured at 10GHz for n- and p-MOSFETs, respectively.
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Yoann Tagro, Aurélien Lecavelier des Etangs-Levallois, Laurent Poulain, Sylvie Lepilliet, Daniel Gloria, Christine Raynaud, Emmanuel Dubois, François Danneville (2012)  High Frequency Noise Potentialities of Reported CMOS 65nm SOI Technology on Flexible Substrate   In: IEEE Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2012 IEEE 12th Topical Meeting on 89 - 92  
Abstract: In this paper, high frequency (HF) noise performance of 65nm SOI n-MOSFETs, initially fabricated on rigid substrate and subsequently reported on flexible substrate (plastic), is presented for the first time. AC and noise performance is extracted from S-parameters measurements performed up to 110 GHz and noise measurements in 6-40 GHz frequency range, respectively. Almost no degradation has been observed between the S parameters measured on SOI rigid 65 nm transistors (referred as Rigid SOI-MOS) and the same thinned transistors transfer-bonded on a flexible substrate (referred to as Flex SOI-MOS). For Flex SOI-MOS, a minimum noise figure (NFmin) as low as 1.1 dB is achieved at 20 GHz, along with an associated gain (Ga) of 14.5 dB, when the transistor is biased at Vds=1.2V and Ids=270 mA/mm: so far, this performance constitutes the best reported one for flexible electronics.
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